(A) The changes in the data at the inputs of the latch are seen at the output
(B) The changes in the data at the inputs of the latch are not seen at the output
(C) Propagation Delay is zero (Output is immediately changed when clock signal is applied)
(D) Input Hold time is zero (no need to maintain input after clock transition)
Related Posts 👇
-
The keyword that is used that the variable can not change state?
(A) static
(B) const
(C) friend
(D) private
-
The boolean expression A + B’ + C is?
(A) a sum term
(B) a literal term
(C) a product term
(D) a complemented term
-
If two adjacent 1s are detected in the input, the output is set to high?
(A) 0011
(B) 0101
(C) 1100
(D) 1010
-
A modulus-14 counter has fourteen states requiring__.
(A) 14 Flip Flops
(B) 14 Registers
(C) 4 Flip Flops
(D) 4 Registers
-
Karnaugh map is used in designing?
(A) a clock
(B) a counter
(C) an UP/DOWN counter
(D) All of the above
-
A 4-bit binary UP/DOWN counter is in the binary state zero. the next state in the DOWN mode is__.
(A) 0001
(B) 1111
(C) 1000
(D) 1110
-
If a circuit suffers “Clock Skew “ problem, the output of circuit can’t be guarantied?
(A) True
(B) False
(C) Both
(D) None
-
The bolean expression A + BC equals?
(A) (A’ + B)(A’ + C)
(B) (A + B)(A + C)
(C) (A + B)(A’ + C)
(D) none of the above